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Double differential ring oscillator architecture with low power, low noise and high stability factor for high speed serial link in RF range

by IPR Cell
|
09-02-2016

Overview

The present invention provides a double differential floating gate ring oscillator where the supply voltage is differentiated two times using three differential architectures of CMOS along with an inverter and a grounded gate, floating drain p-MOS connected to a five stage CMOS ring oscillator through an n–MOS transistor. The three differential architectures are delineated in such a manner so that one differential CMOS resides in between the other two and the differentiated output of the inner most architecture is fed as input to the other two outer differential architectures. Hence, the supply signal is differentiated two times. The five stage ring oscillator is basically used to control the level of phase-shift as well as of offset frequency and is used with RC circuit and RLC circuit. The designed circuit has low noise level, low power dissipation and high stability factor for high speed serial link in RF range.

 

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